1. Field of the Invention
The present invention relates to a poly-silicon film formation method for forming a poly-silicon film (polycrystalline silicon film) doped with phosphorous or boron on a target substrate, such as a semiconductor wafer, and particularly to a technique used for a semiconductor process. The term “semiconductor process” used herein includes various kinds of processes which are performed to manufacture a semiconductor device or a structure having wiring layers, electrodes, and the like to be connected to a semiconductor device, on a target substrate, such as a semiconductor wafer or a glass substrate used for an FPD (Flat Panel Display), e.g., an LCD (Liquid Crystal Display), by forming semiconductor layers, insulating layers, and conductive layers in predetermined patterns on the target substrate.
2. Description of the Related Art
Semiconductor devices comprise various thin films, one of which is a poly-silicon film doped with phosphorous (P) or boron (B). Such doped poly-silicon films are used for resistor elements, gate electrodes, and interconnection lines.
Where doped poly-silicon films of this kind are formed, low-pressure CVD (Chemical Vapor Deposition) is commonly used, because this process is high in controllability and does not generate damage to a target substrate unlike ion implantation.
Conventionally, vertical heat processing apparatuses are widely used to form poly-silicon films doped with phosphorous by low-pressure CVD. Where a poly-silicon film doped with phosphorous is formed in a vertical heat processing apparatus, a wafer boat with a number of semiconductor wafers (which may be simply referred to as wafers) supported thereon is loaded into a reaction tube. Then, the interior of the reaction tube is set at a temperature of, e.g., 590° C. or more, and process gases, such as monosilane (SiH4) gas and phosphine (PH3) gas are supplied into the reaction tube, while the interior of the reaction tube is set at a predetermined vacuum level (for example, Jpn. Pat. Appln. KOKAI Publication No. 9-129562). There is an alternative method, in which disilane (Si2H6) gas is used as a film formation gas in place of monosilane gas, and the process temperature is set at, e.g., 580° C. or less to form an amorphous silicon film doped with phosphorous, and then, the amorphous silicon film is annealed and poly-crystallized at a temperature of, e.g., 600 to 1,000° C. (for example, Jpn. Pat. Appln. KOKAI Publication No. 7-86173).
In recent years, design rules for semiconductor devices have been changed increasingly toward miniaturization, which requires very high process accuracy in forming patterns. However, where a poly-silicon film doped with phosphorous is formed by the techniques described above, the crystal grain size of the film has a lower limit of about 300 nm, which makes it difficult to satisfy a required micro-fabrication.